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d a t a sh eet product speci?cation august 1998 discrete semiconductors buj103ax silicon diffused power transistor
august 1998 1 rev 1.000 philips semiconductors product speci?cation silicon diffused power transistor buj103ax general description high-voltage, high-speed planar-passivated npn power switching transistor in a plastic full-pack envelope intended for use in high frequency electronic lighting ballast applications, converters, inverters, switching regulators, motor control systems, etc. quick reference data symbol parameter conditions typ. max. unit v cesm collector-emitter voltage peak value v be = 0 v - 700 v v cbo collector-base voltage (open emitter) - 700 v v ceo collector-emitter voltage (open base) - 400 v i c collector current (dc) - 4 a i cm collector current peak value - 8 a p tot total power dissipation t hs 25 ?c - 26 w v cesat collector-emitter saturation voltage 0.25 1.0 v h fesat dc current gain i c = 3 a; v ce = 5 v 12.5 - t f fall time ic=2a,i b1 =0.4a 33 80 ns pinning - sot186a pin configuration symbol pin description 1 base 2 collector 3 emitter case isolated limiting values limiting values in accordance with the absolute maximum rating system (iec 134) symbol parameter conditions min. max. unit v cesm collector to emitter voltage v be = 0 v - 700 v v ceo collector to emitter voltage (open base) - 400 v v cbo collector to base voltage (open emitter) - 700 v i c collector current (dc) - 4 a i cm collector current peak value - 8 a i b base current (dc) - 2 a i bm base current peak value - 4 a p tot total power dissipation t hs 25 ?c - 26 w t stg storage temperature -65 150 ?c t j junction temperature - 150 ?c thermal resistances symbol parameter conditions typ. max. unit r th j-hs junction to heatsink with heatsink compound - 4.8 k/w r th j-a junction to ambient in free air 55 - k/w 12 3 case b c e
august 1998 2 rev 1.000 philips semiconductors product speci?cation silicon diffused power transistor buj103ax isolation limiting value & characteristic t hs = 25 ?c unless otherwise specified symbol parameter conditions min. typ. max. unit v isol r.m.s. isolation voltage from all f = 50-60 hz; sinusoidal - 2500 v three terminals to external waveform; heatsink r.h. 65% ; clean and dustfree c isol capacitance from t2 to external f = 1 mhz - 10 - pf heatsink static characteristics t hs = 25 ?c unless otherwise specified symbol parameter conditions min. typ. max. unit i ces collector cut-off current 1 v be = 0 v; v ce = v cesmmax - - 1.0 ma i ces v be = 0 v; v ce = v cesmmax ; - - 2.0 ma t j = 125 ?c i cbo collector cut-off current 1 v cbo = v cesmmax (700v) - - 0.1 ma i ceo v ceo = v ceommax (400v) - - 0.1 ma i ebo emitter cut-off current v eb = 7 v; i c = 0 a - - 0.1 ma v ceosust collector-emitter sustaining voltage i b = 0 a; i c = 10 ma; 400 - - v l = 25 mh v cesat collector-emitter saturation voltage i c = 3.0 a; i b = 0.6 a - 0.25 1.0 v v besat base-emitter saturation voltage i c = 3.0 a; i b = 0.6 a - 0.97 1.5 v h fe dc current gain i c = 1 ma; v ce = 5 v 10 17 32 h fe i c = 0.5 a; v ce = 5 v 12 20 32 h fesat dc current gain i c = 2 a; v ce = 5 v 13.5 16 20 i c = 3 a; v ce = 5 v - 12.5 - dynamic characteristics t hs = 25 ?c unless otherwise specified symbol parameter conditions typ. max. unit switching times (resistive load) i con = 2.5 a; i bon = -i boff = 0.5 a; r l = 75 ohms; v bb2 = 4 v; t on turn-on time 0.52 0.6 m s t s turn-off storage time 2.7 3.2 m s t f turn-off fall time 0.3 0.43 m s switching times (inductive load) i con = 2 a; i bon = 0.4 a; l b = 1 m h; -v bb = 5 v t s turn-off storage time 1.2 1.33 m s t f turn-off fall time 33 80 ns switching times (inductive load) i con = 2 a; i bon = 0.4 a; l b = 1 m h; -v bb = 5 v; t j = 100 ?c t s turn-off storage time - 1.8 m s t f turn-off fall time - 200 ns 1 measured with half sine-wave voltage (curve tracer).
august 1998 3 rev 1.000 philips semiconductors product speci?cation silicon diffused power transistor buj103ax fig.1. test circuit for v ceosust . fig.2. oscilloscope display for v ceosust . fig .3. test circuit resistive load. v im = -6 to +8 v v cc = 250 v; t p = 20 m s; d = t p / t = 0.01. r b and r l calculated from i con and i bon requirements. fig. 4. switching times waveforms with resistive load. fig. 5. test circuit inductive load. v cc = 300 v; -v be = 5 v; l c = 200 uh; l b = 1 uh fig. 6. switching times waveforms with inductive load. + 50v 100-200r horizontal vertical oscilloscope 1r 6v 30-60 hz 300r ic ib 10 % 10 % 90 % 90 % ton toff ts tf ibon -iboff icon tr 30ns vce / v min vceosust ic / ma 100 200 250 0 lb ibon -vbb lc t.u.t. vcc tp t vcc r r t.u.t. 0 vim b l ic ib icon ibon -iboff t t ts tf toff 10 % 90 %
august 1998 4 rev 1.000 philips semiconductors product speci?cation silicon diffused power transistor buj103ax fig. 7. normalised power dissipation. pd% = 100 pd/pd 25?c = f (t hs ) fig.8. typical dc current gain. h fe = f(i c ) parameter v ce fig.9. collector-emitter saturation voltage. solid lines = typ values, v cesat = f(ib); t j =25?c. fig.10. base-emitter saturation voltage. solid lines = typ values, v besat = f(ic); at ic/ib =4. fig.11. collector-emitter saturation voltage. solid lines = typ values, v cesat = f(ic); at ic/ib =4. fig.12. transient thermal impedance. z th j-hs = f(t); parameter d = t p /t 0 20 40 60 80 100 120 140 ths / c % normalised derating 120 110 100 90 80 70 60 50 40 30 20 10 0 with heatsink compound p tot 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0.1 1 10 ic/a vbesat/v 0.01 1 100 10 1 0.1 10 h fe ic / a tj = 25 c 1v 5v 0.0 0.1 0.2 0.3 0.4 0.5 0.1 1 10 ic/a vcesat/v 0.0 0.4 0.8 1.2 1.6 2.0 0.01 0.10 1.00 10.00 ib/a vcesat/v ic=1a 2a 3a 4a 1u 100u 10m 1 100 t / s zth / (k/w) 10 1 0.1 0.01 0.001 d=0 0.5 0.2 0.1 0.05 0.02 10u 1m 100m 10 d = t p t t p t d t p bu1706ax
august 1998 5 rev 1.000 philips semiconductors product speci?cation silicon diffused power transistor buj103ax fig.13. reverse bias safe operating area. t j t j max fig.14. test circuit for reverse bias safe operating area. v cl 1000v; v cc = 150v; v bb = -5v; l b = 1 m h; l c = 200 m h fig.15. forward bias safe operating area. t hs 25 ?c (1) p tot max and p tot peak max lines. (2) second breakdown limits. i region of permissible dc operation. ii extension for repetitive pulse operation. iii extension during turn-on in single transistor converters provided that r be 100 w and t p 0.6 m s. nb: mounted with heatsink compound and 30 5 newton force on the centre of the envelope. 0 100 200 300 400 500 600 700 800 900 0 1 2 3 4 5 6 7 8 9 vceclamp (v) ic (a) 1 10 100 1,000 0.001 0.01 0.1 1 10 100 vceclamp (v) ic (a) icm max ic max i ii iii (1) (2) duty cycle = 0.01 tp = 20us 50us 100us 200us 500us dc 1ms 2ms lb ibon -vbb lc t.u.t. vcc vcl
august 1998 6 rev 1.000 philips semiconductors product speci?cation silicon diffused power transistor buj103ax mechanical data dimensions in mm net mass: 2 g fig.16. sot186a; the seating plane is electrically isolated from all terminals. notes 1. refer to mounting instructions for f-pack envelopes. 2. epoxy meets ul94 v0 at 1/8". 10.3 max 3.2 3.0 4.6 max 2.9 max 2.8 seating plane 6.4 15.8 max 0.6 2.5 2.54 5.08 12 3 3 max. not tinned 3 0.5 2.5 0.9 0.7 m 0.4 15.8 max. 19 max. 13.5 min. recesses (2x) 2.5 0.8 max. depth 1.0 (2x) 1.3
august 1998 7 rev 1.000 philips semiconductors product speci?cation silicon diffused power transistor buj103ax definitions data sheet status objective specification this data sheet contains target or goal specifications for product development. preliminary specification this data sheet contains preliminary data; supplementary data may be published later. product specification this data sheet contains final product specifications. limiting values limiting values are given in accordance with the absolute maximum rating system (iec 134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of this specification is not implied. exposure to limiting values for extended periods may affect device reliability. application information where application information is given, it is advisory and does not form part of the specification. philips electronics n.v. 1998 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. the information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. life support applications these products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips for any damages resulting from such improper use or sale.
august 1998 8 rev 1.000 philips semiconductors product speci?cation silicon diffused power transistor buj103ax notes
august 1998 9 rev 1.000 philips semiconductors product speci?cation silicon diffused power transistor buj103ax notes
august 1998 10 rev 1.000 philips semiconductors product speci?cation silicon diffused power transistor buj103ax notes
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